1. Field of the Invention
The present invention relates to a layout configuration of signal transmission lines of a printed circuit board (PCB), and more particularly to a layout configuration of signal transmission lines of a (PCB) with regard to the signal integrity of high-speed signals.
2. General Background
With the ever increasing speeds of integrated circuits (ICs), signal integrity is becoming one of the most important problems. Many factors, such as the parameters of the electrical elements or the PCB and the layout of the PCB, can affect the signal integrity, or lead to instability of the system, possibly even causing the system to breakdown. Thus, preserving signal integrity has become a key point in the design of a PCB. Impedance matching is an important thing for maintaining signal integrity. When the characteristic impedance of a transmission line does not match the impedance of the load, part of the signal will be reflected at the receiving end of the transmission lines. Thus, the signal will be distorted. Many factors can affect impedance matching, such as configuration, characteristic, topology, and output impedance of the signal source-end of the transmission lines, and characteristics of the load and so on. Now in the design of the high-speed signal circuit, differential signals are widely used to improve signal quality. Differential pairs have the following advantages:                a). A strong capability of resisting interference;        b). Capable of restraining electromagnetic interference (EMI);        c). Precise timing position.How to best utilize these advantages while maintain signal integrity, is a big challenge to an engineer. However, in practice, the impedance of the signal transmission lines does not match that of vias.        
Referring to FIGS. 1 and 2, a PCB 90 includes a first signal plane 3, a ground plane 5, a power plane 8, a second signal plane 31, and three medium layers 4 as shown in FIG. 2. Between two of the planes, which mutually abut, there is one of the three layers 4. In the first signal plane 3, there is a differential pair 33. The differential pair 33 includes a line 1 and a line 2. The line 1 and the line 2 have a same length, and are parallel. A width of the line 1 or the line 2 is W1 as shown in FIG. 2. The space between the line 1 and the line 2 is M1 as shown in FIG. 2. Discontinuous connective points like a via 6 abutting the line 1 and a via 7 abutting the line 2 are symmetrical about the differential pair 33 as shown in FIG. 1. Radiuses of the vias 6 and 7 are same. Generally, impedance of vias is lower than impedance of a transmission line. Thus when a driver of the signal source-end sends a pair of differential signals, values of which are equivalent but polarities of which are opposite to the differential pair 33, the differential signals will be reflected. Through analysis, we find that there is a great deal of reflection in the differential pair 33. The reflection reduces the signal integrity.
What is needed is a differential pair, which can meet with the requirement of impedance matching, reduce reflection, and improve signal integrity.